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| s Product Brief SDA 9388X Single-Chip Picture in Picture IC The SDA 9388X integrates analog (clamping, ADC, DAC, RGB switch) and digital signal processing (decimation, memory, output signal processing etc.) on a single silicon. SDA Potential Application The SDA 9388X is a cost-effective single-chip Picture in Picture IC that requires only a small amount of external components. It is suitable for the following applications: s TVs for NTSC, PAL M and PAL N markets s Display and surveillance equipment Features s Picture reduction to 1/9, 1/16 s PIP frame control including s s s s and 1/36 of original size s Freely programmable positioning of PIP on the main picture as well as POP positioning s s s color, shape and width Format matching of PIP to 16:9 screen Digital signal processing for picture quality optimization Three CVBS inputs; analog YUV or RGB output Integrated high speed video switch for inserting an external RGB source onto the screen (i.e. OSD) I2C-Bus control 0.5 m CMOS technology P-DSO-28 package Documentation and Support Package s Data sheet s Technical articles s PIP module and interface board for evaluation s SIMON Software for Windows based PC to control evaluation boards via I2C Bus s SIMON interface module s Auto demo package for demonstration http://www.siemens.de/semiconductor/ SDA 9388X Block Diagram V DDA 1 V SSA 1 Y Source Select Clamp V DD V SS V DDA 2 V SSA 2 CVBS2 CVBS3 7-Bit ADC Gain Control Lowpass NTSC/PAL UY Filter Chroma Decoder Decimation CVBS1 Line Memory M U X PIP Field Memory D E Output Signal y/g 6 M Processing U RGB Matrix Framing u/b 6 X v/r 6 Triple DAC 6-Bit VREF "With our on-chip system solutions we are providing innovative, in every respect optimized key products for the multimedia age. In so doing Siemens Semiconductors is going to get one of the major players in the market of logic ICs." Dr. S. Mehrgardt, President, Siemens Semiconductors Signal Processing Division VREFH VREFL Closed * Caption Data Slicer Inset Synchronization Read/Write Controller Picture Position Control Parent Clock Generation 3 R/V G/Y (OUT) B/U BLK R G (IN) B SEL RGB Switch Clock Generation (Quarz Oszillator) Parent I2 C Clock Controller Gen Patent Sync Signal Processing A Wien (+43) 1-1707-356 11 Richmond (Melbourne), Vic. 3121 (+61) 3-9420 71 11 Brussel/Bruxelles (+32) 2-536 23 48 Sao Paulo-SP (+55) 11-836 23 77/ 26 84 Mississauga, Ontario L5T 1P2 (+1) 905-819 80 00 Zurich (+41) 1-495 30 65 Dusseldorf (+49) 211-399 15 51 Laatzen (Hannover) (+49) 511-877 27 06 Nurnberg (+49) 911-654 76 22 Stuttgart (+49) 711-137 33 14 Munchen (+49) 89-9221 40 86 Ballerup (+45) 4477-44 77 Tres Cantos-Madrid (+34) 91-514 80 00 Saint-Denis CEDEX 2 (+33) 1-4922 31 00 Espoo (Helsinki) (+35) 9-5105 1 Berkshire RG 12 8FZ (+44) 1344-39 60 00 Amaroussio/Athen (+30) 1-686 41 11 Hong Kong (+852) 2832 05 00 Milano (+39) 2-6676-1 New Delhi 110 014 (+91) 11-461 74 47 Bangalore 560 001 (+91) 80-227 98 74 Mumbai (+91) 22-496 21 99 IRL Dublin 4 (+353) 1-603 23 42 J AUS XFREQ Analog Functions XQ XIN SDA SCL VP/SCP SCP Tokyo 141-0022 (+81) 3-5449 64 11 Penang (+60) 4-644 99 75 Oslo 5 (+47) 22-63 30 00 Den Haag (+31) 70-333 24 29 Auckland (+64) 9-520 30 33 Amadora (+35) 1-417 00 11 Islamabad (+92) 51-21 22 00 Warszawa (+48) 2-670 91 51 Taipei (+886) 2-2773 66 06 Seoul 135-080 (+82) 2-527 77 00 Moskva (+7) 095-237-64 76, -69 11 Kista (+46) 8-703 35 00 Singapore 349 253 (+65) 840 06 10 Findikli (Istanbul) (+90) 212-251 09 00 Cupertino, CA 95014 (+1) 408-777 45 00 Cupertino, CA 95014 (+1) 408-257 79 10 Iselin, NJ 08830-2770 (+1) 732-906 43 00 Beijing (+86) 10-6857 90 -06, -07 Shanghai 200003 (+86) 21-6361 26 18/19 * PIP III plus MAL B N BR NL The SDA 9388X integrates different functional blocks on a single chip s Signal clamping and 7-Bit s Output signal processing, i.e. AD Converter peaking s NTSC/PAL M/ PAL N Chroma s Triple 6-Bit DA Converter decoder s RGB Switch s Decimation logic s SYNC processing/generation and memory control logic s 72-Kbit field memory CDN NZ P CH PK D PL RC ROK RUS Availability Samples of the SDA 9388X are available with complete documentation for evaluation. SIEMENS' highly experienced engineering support team can assist you with your design in work. Please contact your local Siemens office for further details. DK S E SGP F TR FIN USA GB SDA 9388X Application Example Tuner 1 CVBS 1 CVBS 2 (e.g. VCR) CVBS 3 (e.g. SAT) Sync BLK RGB PIP III SDA 9388X R/V G/Y B/U Select R RGBProcessor G B GR HK VRC I IND ZA Halfway House 1685 (+27) 11-652-20 00, -27 00 How to reach us: http://www.siemens.de/semiconductor/ address/address.htm (c) Siemens AG 1998. All Rights Reserved. Please note that any information contained in this publication may be subject to change. Siemens reserves the right to make changes to or to discontinue any product or service identified in this publication without notice. Please contact our regional offices to receive the latest version of the relevant information to verify, before placing orders, that the information being relied upon is current. Teletext or OSD processor (optional) R/V Tuner 2 CVBS Color Decoder for Main Channel G/Y B/U Published by Semiconductor Group Siemens Aktiengesellschaft Ordering No. B110-H7264-X-X-7600 Printed in Germany PS 08983. |
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